Hi,
I am planning to have a new FPGA board to implement a NIOS design, can you help to find the most suitable board?
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Hi,
Regarding gate count, most of the dev kit will typically be very large, hopefully much larger than our design. We can utilize a max of 60-70% FPGA resources.
Key here is memory requirement,
The Quartus tools will estimate for you how many gates your design requires.
Regards
Anand
Hi,
Regarding gate count, most of the dev kit will typically be very large, hopefully much larger than our design. We can utilize a max of 60-70% FPGA resources.
Key here is memory requirement,
The Quartus tools will estimate for you how many gates your design requires.
Regards
Anand
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