FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5922 Discussions

How to deal with the error(169079)?Other project use the same LVDS signal and pins,and compile successful.

yzhan275
Beginner
566 Views

Error (169079): Pad 138 of non-differential I/O pin 'pin93' in pin location F13 is too close to pad 136 of differential I/O pin 'APBLCLK(n)' in pin location G16 -- pads must be separated by a minimum of 5 pads. Use the Pad View of Pin Planner to debug.

0 Kudos
3 Replies
ShafiqY_Intel
Employee
510 Views

Hi yzhan275,

 

Can you provide me the background of your design for further debug?

e.g. (device full name, quartus version and etc)

 

Thanks

0 Kudos
yzhan275
Beginner
510 Views
EP3C10U256C6 VER:12.0------------------ 原始邮件 ------------------
0 Kudos
ShafiqY_Intel
Employee
510 Views

Hi yzhan275,

 

For this issue, the placement of your pin is too close. The pad must be separated by min 5 pads.

 

solution: Use the Pad View window of the Pin Planner to check the pad placement, and then assign one of the conflicting I/O pins to a different location

 

Thanks

0 Kudos
Reply