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I am trying to run this example (see url link) to get acquainted with Quartus and the simulator. https://www.intel.com/content/www/us/en/programmable/documentation/aym1499789502823.html
But running the compiler I am always getting this error: Error (12024): WYSIWYG primitive "general[0].gpll" is not compatible with the current device family.
I tried the following devices (MAX 10, Cyclone 10 LP and Cyclone IV), but the problem still exists. I am using: Quartus Prime Version 19.1 Build 670 09/22/2019 SJ Lite Edition. Maybe the Lite edition does not apply, I don't know.
Any idea what I am doing wrong?
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What is the IP that you are using for your design? can you attached your design.qar here to take a look?
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I am very new to Intel FPGA so I do not quit understand what you mean with IP in this example.
The example consists of a complete project in a zip file. There is no design.qar file.
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The document doesn't say it, unfortunately, but the project file (.qsf) indicates that this design uses a Cyclone V device. Make sure you have Cyclone V devices installed before opening the project.
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