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HI,
You can instantiate two DDR4 IP, each with 64 DQ width to get total of 128 DQ width support.
Thanks.
Regards,
dlim
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I observed that the total number of DQ pins available in DDR4 is 64. By instantiating two DDR4 IP , will I be able to access 128 bits simultaneously in the same clock cycle?
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Short answer is YES provided that both DDR4 IP memory controller is able to process the data simultaneously else we should expect data delay from one of the DDR4 IP.
Regards,
dlim

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