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Hello,
Sorry for misunderstanding your meaning. I downloaded the GHRD project for Cyclone V from Rocketboards and made modifications based on GHRD. On the FPGA side, I used FIFO and SGDMA IPs, but on the HPS side, I did not use IP. I did not use Ethernet IP, just wrote code on the HPS side to read the data in DDR3 and send it through the sendData function.
Thanks.
//main code
#include <stdio.h>
#include <stdint.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
#include "sgdma_dispatcher.h"
#include "sgdma_dispatcher_regs.h"
#include "ethernet_sender.h"
#define DISPATCHER_CSR_BASEADDR_W 0xC0001000
#define DISPATCHER_DESC_BASEADDR_W 0xC0002000
#define DISPATCHER_CSR_BASEADDR_R 0xC0003000
#define DISPATCHER_DESC_BASEADDR_R 0xC0004000
#define HPS_MEM_STORE_STARTADDR 0x10000000
#define FRAME_WIDTH 1280
#define FRAME_HEIGHT 720
#define PIXEL_FRAME 14
#define PIXEL_SIZE 2
#define FRAME_SIZE (FRAME_WIDTH * FRAME_HEIGHT * PIXEL_FRAME * PIXEL_SIZE)
int main(int argc, char* argv[]) {
int mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
if (mem_fd == -1) {
perror("Error opening /dev/mem");
return -1;
}
// Map the HPS DDR3 memory region to user space
uint8_t* data = (uint8_t*)mmap(NULL, 0x2FFFFFFF, PROT_READ, MAP_SHARED, mem_fd, HPS_MEM_STORE_STARTADDR);
if (data == MAP_FAILED) {
perror("Error mapping DDR3 memory");
close(mem_fd);
return -1;
}
// Create dispatcher control
tcSGDMADispatcher write_dispatcher(DISPATCHER_CSR_BASEADDR_W, DISPATCHER_DESC_BASEADDR_W, 0);
// Create descriptors
tsSGDMADescriptor write_descriptor = {0};
while (1) {
write_descriptor.write_addr = HPS_MEM_STORE_STARTADDR;
write_descriptor.length = FRAME_SIZE;
write_descriptor.control.msBits.end_on_eop = 1;
write_descriptor.control.msBits.go = 1;
write_dispatcher.WriteDescriptor(write_descriptor);
sendData(data, FRAME_SIZE, "192.168.137.1", 12345);
}
// Unmap the DDR3 memory region and close /dev/mem
munmap(data, 0x2FFFFFFF);
close(mem_fd);
return 0;
}
