How to start and run a baremetal aplication without the debug

[CAlex]

Hi,

I've managed to debug my code and now I want to test it on FPGA side.

The issue is my board (cyclone V soc dev kit) has only one uart to Jtag yet I need to monitor the FPGA and HPS at the same time.

So I need to run the HPS program first and then use Jtag to debug the Fpga program.

I prefer to use the SD card as ROM and let the board start from there.

The problems are: 

1. I now have the preloader in the A2 and nothing more, where should I put the baremetal program?

2. After putting it to the right place how can I start my program?

3. I've learnd that I have to generate the elf file other than axf file, then use the mkimg tool to translate it to bin, do you have any guide to do that?

That's all.

Thnak you for your willing to help 

Reguards.

[CAlex]

Update1:

I found the file :

1.5.2. Booting from SD/MMC – Custom Partition (intel.com)

but it needs to be updated.

According to :

Building Bootloader for Cyclone V and Arria 10 | Documentation | RocketBoards.org

I still need to use bsp - editor but all the options are useless.

So if I want to start the baremetal program by sd card, what settings do I need to do in u-boot?

Do you have any updated guide or just explain the u-boot settings so that baremetal program can be loaded while booting?

[CAlex]

Update 2:

According to 1.5.2. Booting from SD/MMC – Custom Partition (intel.com)

I need to get:

1. preloader-mkimage.bin, is it made from u-boot-spl or other files? The bootloader guide on rocketboards said that u-boot-spl.sfp is the file needed to the image.

2. the baremetal axf file to bin file and finally to -mkimage.bin file, so what is the mkimage -a need to be set ? what is that parameter decided from?

3. If I want to put them to SD card then the spl image is in A2 disk and can baremetal bin be at FAT or A2? How to set the UBoot to let the spl point to this image?(by setting the payload? And which setting can do this on menuconfig: spl.boot.SDMMC_NEXT_BOOT_IMAGE = 0x40000 )

[Jeet14]

Hi,

Please allow some time to check internally if there any guide available on this.

I will update ASAP.

Regards

Tiwari

[CAlex]

Hi,

thank you for the reply,

           The main thing is how to setup the Uboot(SPL?) so that the board know from where it should run the spl and from where it should run next(in my case it is the baremetal bin).

Looking forward to your reply

Reguards.

[Jeet14]

Hi,

Yes, preloader-mkimage.bin is generated from u-boot-spl file.

For .axf to .bin you can use mkimage utility or

In eclipse, the post-build steps (under Build Steps tab in the C/C++ Build Settings):

fromelf --bincombined ${ProjName}.axf --output=${ProjName}.bin

Please find below link to compile the SPL and preloader for baremetal application.

https://www.rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization131

We also have AN709, where it is explain for booting from SD card-Custom partition & FAT partition.

Let me know if you have any query on this.

Regards

Tiwari

[CAlex]

Hi,

Sorry I didnt explain my confusion clearly,

I'm now using SOC EDS 20.1 and cycloneV soc, so BSP-editor is not working any more.

Your resource is for 13.1 or earilier if Im correct.

according to :

Building Bootloader for Cyclone V and Arria 10 | Documentation | RocketBoards.org

"

For Cyclone V SoC and Arria V SoC, the handoff information created by Quartus compilation comes in several formats: C source code, XML and binary files. Bsp-editor takes this information and turns it into source code which is used to build U-Boot. For older versions of SoC EDS, the user could set various U-Boot parameters in bsp-editor. For the current version of SoC EDS, they have no effect.

"

So I have to set the Uboot myself.

According to AN709, which is 1.5.2. Booting from SD/MMC – Custom Partition (intel.com) I posted in my updates.

"

1. Make sure to select the following options:

   • Check the option spl.boot.BOOT_FROM_SDMMC
   • Uncheck the other boot options (spl.boot.BOOT_FROM_RAM, spl.boot.BOOT_FROM_QSPI, spl.boot.BOOT_FROM_NAND)
     Note: spl.boot.SDMMC_NEXT_BOOT_IMAGE = 0x40000. This is the location where the bare-metal application image is stored.
   • Check the option spl.boot.SDRAM_SCRUBBING and spl.boot.SDRAM_SCRUB_REMAIN_REGION. This zeroes out the SDRAM, preventing any ECC errors to occur during bare-metal program execution.
   • Uncheck the option spl.boot.WATCHDOG_ENABLE. This is because we are not kicking the watchdog in our bare-metal application.
2. Compile the Preloader. This creates the file preloader-mkpimage.bin.

"

I need to know how to set these settings in Uboot.

Now I didnt find the location to set:

spl.boot.SDMMC_NEXT_BOOT_IMAGE = 0x40000.

spl.boot.SDRAM_SCRUBBING

spl.boot.SDRAM_SCRUB_REMAIN_REGION

And I didnt know the mkimage -a xxxxx meaning as well.

reguards.

[CAlex]

Hi,

 which spl file are you saying, there are several spl files, u-boot-spl and u-boot-splx4.sfp are mainly used in the guide. So which one is needed.

also any update for my new questions?

Reguards.

[Jeet14]

Hi,

We have tested the baremetal application booting from QSPI with new method and this used the u-boot-splx4.sfp.

Let me test for sd card with new method and will update you ASAP.

Regards

Tiwari

[CAlex]

Hi,

please do tell me how you do it,

thank you for your effort.

reguards.

[Jeet14]

Hi,

I am also facing issues at my end. Please allow some more time.

Will update you ASAP.

Regards

Tiwari

[CAlex]

Sure, please take your time.

[Jeet14]

Hi,

I believe same query from your side, my another colleague is also handling.

We are checking internally, will update you ASAP.

Regards

Tiwari.

[Jeet14]

Hi,

Please follow the below link to build the bootloader for Cyclone V.

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10#Cyclone_V_SoC_45_Boot_from_SD_Card

1.Get hwlibs, install toolchain

cd $TOP_FOLDER 

git clone https://github.com/altera-opensource/intel-socfpga-hwlib 

cd intel-socfpga-hwlib/tools 

./install_linaro.sh 

./generate_doxygen.sh 

export PATH=`pwd`/gcc/bin:$PATH

2.Build uboot from above shared link for Sd card.

3.Build Application

cd $TOP_FOLDER 

cd intel-socfpga-hwlib/examples/CVAV/Altera-SoCFPGA-HardwareLib-Timer-CV-GNU/ 

# build once to bring hwlibs code 

make SEMIHOSTED=0 MEMORY=ddr 

# cleanmak 

make clean 

# change hwlibs link address to match what U-Boot wants 

sed -i 's/0x00100040/0x01000040/g' hwlib/src/linkerscripts/cvav-ddr.ld 

# move stack out of the way just in case 

sed -i 's/0x80000/0x00200000/g' hwlib/src/linkerscripts/cvav-ddr.ld 

# build again with the new address 

make SEMIHOSTED=0 MEMORY=ddr 

# create binary file 

arm-eabi-objcopy -O binary application.elf application.bin 

# create img file 

$TOP_FOLDER/cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga/tools/ 

mkimage -A arm -T standalone -C none -a 0x01000040 -e 0x01000040 -n "bare-metal image" -d application.bin application.img 

4.Build Image

cd $TOP_FOLDER 

cat cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga/spl/u-boot-splx4.sfp \ 

intel-socfpga-hwlib/examples/CVAV/Altera-SoCFPGA-HardwareLib-Timer-CV-GNU/application.img \ 

> final-image.bin

5.create Sd card image

cd $TOP_FOLDER/sd_card

cp ../cv_soc_devkit_ghrd/software/bootloader/u-boot-socfpga/final-image.bin .

cd $TOP_FOLDER/sd_card

sudo python3 ./make_sdimage_p3.py -f \

-P final-image.bin,num=3,format=raw,size=10M,type=A2 -s 80M -n sdimage.img 

6.Creating SD Card on Windows-

https://www.rocketboards.org/foswiki/Documentation/CycloneVSoCGSRD#Creating_SD_Card

Let me know if you have any other query on this.

Regards

Tiwari

[CAlex]

Hi

"

# change hwlibs link address to match what U-Boot wants 

sed -i 's/0x00100040/0x01000040/g' hwlib/src/linkerscripts/cvav-ddr.ld 

# move stack out of the way just in case 

sed -i 's/0x80000/0x00200000/g' hwlib/src/linkerscripts/cvav-ddr.ld 

# build again with the new address 

make SEMIHOSTED=0 MEMORY=ddr 

"

Is that the code that  let the SPL start from vfat?

Could you please explain the use of those four addresses?

I guess 0x00100040 is the -a and 0x01000040(is that related to the spl?) is the -e address for mkimage?

What is the function of 0x80000 and 0x00200000? And how you get these addresses?

Sorry for the dumn questions, and sorry for the thread confusion.

This thread is not related to the other for I tried this in different ways.

Thank you for your reply.

Reguards.

[Jeet14]

Hi,

I believe your enquiry has been answered. With that, I now transition this thread to community support. 

Thank you.

Best Regards,

Tiwari

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

[Jeet14]

Hi,

0x01000040 is to load or run your application from the DDR.

0x00200000 is to resize your stack size for application on DDR.

This depend on your design and user config for selection the different partition like .stack, .heap, .ro, .data, .text, etc in you application linker script.

And, I believe your original query has been answered and resolved. With that, I now transition this thread to community support. 

If you have any other query then I suggest you to post new case on the forum, we will assist you further.

Thank you.

Best Regards,

Tiwari

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

[CAlex]

Hi,

I made a helloworld code and compiled it as you said,

but the image didnt print any thing:

 "

U-Boot SPL 2020.07-08705-g35d7cfb999-dirty (Jun 28 2023 - 19:53:47 +0800)
DDRCAL: Scrubbing ECC RAM (1024 MiB).
DDRCAL: SDRAM-ECC initialized success with 579 ms
Trying to boot from MMC1

U-Boot SPL 2020.07-08705-g35d7cfb999-dirty (Jun 28 2023 - 19:53:47 +0800)
DDRCAL: Scrubbing ECC RAM (1024 MiB).
DDRCAL: SDRAM-ECC initialized success with 579 ms
Trying to boot from MMC1

U-Boot SPL 2020.07-08705-g35d7cfb999-dirty (Jun 28 2023 - 19:53:47 +0800)
DDRCAL: Scrubbing ECC RAM (1024 MiB).
DDRCAL: SDRAM-ECC initialized success with 579 ms
Trying to boot from MMC1

"

Do you know how to solve it?

Reguards.

[Jeet14]

Hi,

We have same query from you on other forum(05882527) thread, me and my other colleague working on this.

I am closing this forum case(05871414) as other forum(05882527) is active.

Thanks & Regards

Tiwari