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How to use LVDS input clock in DE3 board as inclk0 in ALTPLL

Altera_Forum
Honored Contributor II
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Hi, 

 

I have DE3 board and in one input port I have a clock around 200MHz as LVDS pair. I need to generate one clock with 400MHz and pin it to CLK_OUT (to SMA connector). 

 

I considered that I can use ALTPLL megawizard to generate 400MHz from 200MHz. 

 

Actually I cannot connect input clock for this megawizard to LVDS pair (I am using DE3 specific project generator where all LVDSes are already mapped to ALTLVDS, so I hope that everything are ok with input). 

 

In the same time I can connect the input (inclk0) to the internal oscillator with 50MHz and get 400MHz (with 8 time multiplication), but I do not want to use this clock because this clock can be slightly differs from my input LVDS clock. 

 

Please, suggest me what to do, can I convert LVDS input 200MHz clock to the output 400MHz clock? 

 

Thank you! 

 

Sincerely, 

 

Ilghiz
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