How works resistor-stuffing option in Cyclone V gt board between SDI Channel and HSM port A, and how change this interfaces?

[CheePin_C_Intel]

Hi,

As I understand it, you have some inquiries related to the CV GT devkit. To ensure we are on the same page, just would like to check with you on the following:

1. What is the specific CVGT devkit that you are using?
2. Would you mind to further elaborate on the "resistor-stuffing" that you are referring to? Is it some option mentioned in the user guide?
3. Are you trying to perform some modification to the devkit?

Please let me know if there is any concern. Thank you.

[AEShemet]

Hi,

1. I'm using Cyclone V GT FPGA Development Kit: https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-cyclone-v-gt.html

2. Yes, about this option written in reference manual about my board, in chapter about SDI Channel: "this interface shares a transceiver channel with the HSMC port (transceiver channel 3) through a resistor-stuffing option". Also written that switching the placement of resistors

is necessary for interface enable. But I guess, it's not about the changing of their placement on the board.

3. No, my board is still in box.

Also, when I tried compile my project in Quartus, Fitter generated error 14566 "The Fitter cannot place periphery component(s)".

Thank you.

[CheePin_C_Intel]

Hi,

Sorry for the delay. This case was not auto populated into my list after the recent migration. Sorry for the inconvenience.

Thanks for your update. Please see my responses to your latest inquiries:

1. resistor-stuffing option

[CP] For your information, the default resistor placement on the board connect the XCVR ports to HSMC part A. If you would like to connect the XCVR ports to SDI IN/OUT, you would need to remove resistor and replace to new position as mentioned in the Table 2–23. Resistor Switching to Enable the SDI Channel in the reference manual. This would require modification on board. For example, for GXB_TX_L7, you would need to remove R41 and place resistor at R45. You can refer to the board schematic -> sheet #7 for further details.

2. Also, when I tried compile my project in Quartus, Fitter generated error 14566 "The Fitter cannot place periphery component(s)".

[CP] This seems to be related to placement violation in your design. Please help to further elaborate on the specific module which trigger this error.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

[AEShemet]

Hi,

Thanks for your answer.

2. This problem is in pin p4 and pin p3. In my board SDI and HSMC portA use this pins.

[CheePin_C_Intel]

Hi,

Thanks for your update. As I understand it, you are referring to the P4 and P3 output pins of FPGA. As I look at the schematic, by default, these two pins are connected to HSMC Port A through R41 and R42. There is no connection to the SDI output port on-board. Since you can only choose either SDI output or HSMC Port A at one time, if you want to connect to SDI output, you will need to remove R41 and R42 resistors, then put resistors at R45 and R46. Hope this is helpful.

Please let me know if there is any concern. Thank you.

Best regards,

Chee Pin

[CheePin_C_Intel]

Hi,

I believe the initial inquiry has been addressed. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.