I am designing a PCIe Card with Arria 10 FPGA. I also have an external 16-bit parallel NOR FLASH to hold the configuration image. During system power-up, I am unable to get the FPGA completes its configuration via FLASH before the Root-Complex de-assert the PCIe RESET. Any solution?
yes , it is possible via CvP (Configuration via protocol IP )
Here is the link for your reference
yes....In the design you have to add the "Intel FPGA serial Flash loader IP core and ASMII ip core " Then using JTAG (USB blaster) you can directly load the FPGA image into the flash .
Here is the link from intel application notes
Also make sure you select the right serial flash device which is recommended by the Intel . List of supported device given below
Thank you ,