module R1(c,m,p,q,i1,i2);
input [4:0]p;
input [5:0]q;input [7:0]m;
input[5:0] i1,i2;
output [19:0]c;
//reg [15:0]on;
wire [15:0]e;wire[15:0]d;wire [9:0]s;
integer k,l;
wire [9:0] j1,j2,j3,j4,j5,j6;
wire a1,a2,on;
always@(i1)
begin
k=i1;
l=i2;
if(i1[0]==1'b0 & i2[0]==1'b0)
begin
$display("not prime");
end
else
if((p%k==0)|(q%l==0))
$display("prime");
else
begin
$display("not prime");
end
end
assign s= p&q;
assign a1= p-1;
assign a2= q-1;
assign on = a1&a2;
module R1_enc(j5,j4,e);
input e;
output j5,j4;
always@(i1)
begin
//for (j=0;j<6;j=j+1)
//begin
assign j1=on % e;
assign j2=e % j1;
assign j3=j1 % j2;
assign j4=j2% j3;
assign j5=j3 % j4;
assign j6=j4 % j5;
//end
end
if(((j4%j5)==0)&((j3%j4)==1))
begin
//for(i=1;i<=n;i+1)
assign j1=on-(e&1010);
assign j2=e -(j1&1);
assign j3=j1-(j2&110);
assign j4=j2 -(j3&1);
end
else
begin
R1_enc(j5,j4,e);
end
//if((j3 -(j4&1))==1)&&((j4 -(j4&1))==0))
//if((j4 -(j4&1))==0)
begin
always@(e)
begin
if((j3-(j4&1))==1)
assign j4= j2-(j3&1);
if((j3-(j2&1))==1)
if((-1&j2)|(j3&10)==1)
assign j3= j1-(j2&110);
if(((-1&j2)|(j3&10))==1)
if((10&j1)|(-j2&1101)==1)
assign j2= e-(j1&1);
if((10&j1)|(-j2&1101)==1)
if((-1101&e)|(j1&1111)==1)
assign j1= on-(e&1010);
end
if(((-1101&e)|(j1&1111))==1)
if(((1111 & on)|(e & -10100011)|(e & on)|(-e & on))==1)
if(((1111 -e)& on)|(e & (on-10100011))==1)
if(((110011101 & e)|(on & -100110)) ==1)
end
always@ (e)
begin
if(((110011101 & e) % on )== 1)
begin
$display("110011101 is d");
$display("private key is (e,n)");
$display("public key is (d,n)");
end
endmodule
