I have a cyclone 5 gx starter kit where i am trying to create a hardware that counts number of pulses generated by a source? according to logic count should increase every negative edge by one but actually it increases by 7 or 8.

[VLadw]

pulses are generated by a speed encoder that gives one pulse per revolution.

input is taken by GPIO header pin 2 i.e. pin D26 on my FPGA Board

device : 5CGXFC5C6F27C7

cyclone 5 family

code used: i have quoted the part that is counting in bold and italic

module speedcal  (

 sig,//pulses from encoder

 clk,//ref clock 50MHz

 out,//speed output

 value//counter for verification

);

//////////IO DECLARATION

 input            sig;

 input            clk;

 output [15:0]   out;

 output   [15:0]    value;

/////////INT/EXT REG/WIRE DECLARATION

 wire             sig;

 wire             clk;

 wire   [15:0]   out;

 reg    [27:0]   count;

 reg    [15:0]   value;

 reg    [15:0]   temp;

 reg      [15:0]    track;

 reg    [15:0]   store;

 reg              check;

/////////MAIN

 initial begin

   count = 28'hfffffff;

   check = 1'b0;

 end

 //50,00,000 count is 4C4B40

 always @ ( posedge clk )

 begin:COUNT_TIME

   count = count + 28'h0000001;

   if( count == 28'h04c4b40 ) begin

     count = 28'h0000000;

     check = ~check;

      track = value;

   end

 end

 always @ ( negedge sig )

 begin:DIFFERENCE

   value = value + 15'h0001;

 end

 always @ ( posedge check )

 begin:RPMCAL

   if( value > temp ) begin

     store = value - temp;

     temp = value;

   end else begin

     temp = value;

   end

   if( track == value ) begin

      store = 16'h0000;

   end

 end

 assign out = store * 12'h12c;

endmodule

[Rahul_S_Intel1]

Hi ,

Code is generic, but do check exact physical data is coming to the GPIO pin

[VLadw]

Sir i tested and made sure that the inputs to the pin is a perfect wave and according to your comment i can conclude code is good. so last thing only stays may be when there is no signal on pin it toggles itself so adding a pull-up might work i guess. thanks you very much for clearing my doubts towards the code i am actually new to this and started developing since last few days.

will highlight if found any solution

thank u for the response.

[VLadw]

Hi i got the culprit as you said, previously i was testing the output of the speed encoder that was clean but missed to check the output of logic level shifting circuit. i used it as the encoder works for 5v and board accepts only 3.3v on GPIO. after the logic-level shifting circuit because of switching ringings is present. It that stays for a time of 4us before signal stabilizes. I will add a de-bounce circuit to clean that up.

[Rahul_S_Intel1]

Hi VLadw,

I am glad that you could able to find the issue, and also when ever this kind of issue is happening, I am requesting to check signal level first. Because that is the first stage of debugging.

Regards,

RS