FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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I have designed a 8 bit hex counter to display on a 7 seg and debounced with a jkff but it is still bouncing I compared it to my classmates and its the same but theirs work. Any help would be appreciated

SBurk3
Beginner
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sstrell
Honored Contributor III
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Without seeing code or more details on the design, there's no way to help.

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Vicky1
Employee
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Hi Sean, Yes, It`s difficult to support without code. Now either you can verify the design using testbench or check the frequency used while implementing it on board(need to step down). Regards, Vikas
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