Im a newbie at FPGA and intel quartus prime. Im trying to practice with cyclone V starter kit and THDB-ADA board to create a 14bits sine wave at 10MHz by a 125MHz clock and a NCO created by IP catalog. But I got notthing but background noise at output. I have checked the output and pinout in Pin planer, it exaclly like the Altera's demo.
As I understand it, you have some inquiries related to using NCO in CV device to generate 10MHz sine wave. You are interface the CV devkit with Terasic THDB-ADA daughter card. You seems to mention about Altera demo. Just would like to check with you if you are using any example design?
To facilitate further debugging, would you mind to do the following:
1. Just wonder if you have had a chance to perform Modelsim simulation with you CV NCO design to see if the NCO output is expected? This will be helpful to isolate functional issue prior to hardware testing.
2. If there is no issue with the Modelsim simulation, you may proceed to hardware and then use signaltap to verify the NCO output.
3. If the above #1 and #2 have no issue, you might need to further look into the daughter card to cross check the user guide to see if you can spot any anomaly.
Please let me know if there is any concern. Thank you.
thank you so much for replying my question. I have solved this problem. I intended to use just channel A of the DAC on the daughter card but it requires clock on both channel A and B. When I used a same clock for channel A and B, it worked and generated 2 sinwave exaclly the same at the output.