I would like to request the tray packaging datasheet for PN#5M160ZT100C5N which including the infoarmations below. Length, width, thickness, tray size (length), tray size (width), tray pitch (row), tray pitch (column), tray row (qty), tray column (qty),

[KLiew7]

orinetation, leadball/pitch, peak temperature, washable or not, time above liquids and heat cycle.

[NurAiman_M_Intel]

Hi,

Thank you for contacting Intel community.

1- For tray dimension 5M160ZT100C5N, please refer to tray drawing that was send through private message.

2- For tray orientation, it is live bug orientation, please refer to the AN71:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an071.pdf

3- For peak temperature, washable or not, time above liquids and heat cycle, kindly refer to process reflow in AN353:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an353.pdf

Do let me know if you need further information.

Regards,

Aim

[KLiew7]

Hi Aim,

Thanks for your update.

By the way, is all the information that provided above applicable to CPLD products only?

What about others Intel products with tray packaging?

[NurAiman_M_Intel]

Hi,

All of the information provided above is applicable to all Intel FPGA product.

Thank you.

Regards,

Aim