FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5288 Discussions

I would like to verify the JTAG pinout, where can I get a refence design schematics for 5M80ZT100 and MAXV5M40ZE64?

EDing
Partner
415 Views
 
0 Kudos
1 Reply
YuanLi_S_Intel
Employee
198 Views

Hi Ellen,

 

Apologize that we dont have design schematics for 5M80ZT100 and 5M40ZE64. However, we have pin connection guidelines for MAX V. You may refer to link below for pin connection guidelines:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-v/pcg-01012.pdf

 

Regards,

YL

Reply