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Altera_Forum
Honored Contributor I
772 Views

IP for CAN

Has anybody advice for that?

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10 Replies
Altera_Forum
Honored Contributor I
84 Views

On OpenCores website (http://www.opencores.org/) you find an open source IP core for CAN controller. 

Beware that CAN is a proprietary technology by Bosch and you should get a licence from them in order to integrate the core in your fpga for production. 

 

Regards
Altera_Forum
Honored Contributor I
84 Views

Thanks you for your response. 

 

I am a newby so How can I add this IP in my system? 

Throgouth SOpcBuilder or how? 

 

Regards
Altera_Forum
Honored Contributor I
84 Views

Most of the cores on the Opencores website use a wishbone interface, so you'll have to write your own glue code to adapt them to the Avalon bus used in SOPC builder.

Altera_Forum
Honored Contributor I
84 Views

Thank for the advice already. 

So this is like the Interface between Wisbone and Avalon ? 

Do you have any advice or example for Glue code ? I have never did it before.
Altera_Forum
Honored Contributor I
84 Views

That CAN IP Opencore can also be configured for a standard 8 bit asynchronous memory interface; so you can possibly connect it to your system through the sopc tristate bus, if you don't have strong performance needs. 

Cris
Altera_Forum
Honored Contributor I
84 Views

No ! 

 

tri states are only available for outside connectivity not inside the fpga between modules. 

a tristate is done by using an output buffer and controlling its output enable input.
Altera_Forum
Honored Contributor I
84 Views

 

--- Quote Start ---  

 

tri states are only available for outside connectivity not inside the fpga between modules. 

a tristate is done by using an output buffer and controlling its output enable input. 

--- Quote End ---  

 

 

I don't know how Quartus actually synthesizes the sopc tristate bus. I believe this is not a true tristate. 

If I connect it to another inside-fpga module it works perfectly. 

I've already done it successfully both with OpenCore CAN module and with other IP cores exposing an AMI. 

 

Cris
Altera_Forum
Honored Contributor I
84 Views

I saw a wishbone<->avalon bridge example code on this website two weeks ago. 

 

I do not have a link right now. but if you search it you will find it.
Altera_Forum
Honored Contributor I
84 Views

Altera_Forum
Honored Contributor I
84 Views

Hi, 

 

you can also find some informations about connecting Wishbone <-> Avalon on wiki! 

 

http://en.wikipedia.org/wiki/wishbone_%28computer_bus%29
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