FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5239 Discussions

If I use 1.35V for DDR3L and 3.3V for other IOs, what should be the voltage on VCCPD rail.

SKacc
Novice
302 Views

Recommended operating conditions of datasheet(av_51002) says "VCCPD must be 2.5 V when VCCIO is 2.5, 1.8, 1.5, 1.35, 1.25, or 1.2 V. VCCPD must be 3.0 V when VCCIO is 3.0 V. VCCPD must be 3.3 V

when VCCIO is 3.3 V."

 

0 Kudos
1 Reply
BoonT_Intel
Moderator
60 Views

Hi Sir,

With this combination, are you able to let the Quartue compilation pass fitter?

If it pass, then you can check the .pin file and see what voltage level should connect to the VCCPD pin.

Reply