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Intel Cyclone V SOC Development Kit

hv2220
Beginner
517 Views

I’m currently using the Cyclone V SoC Development kit. I’m using this board to generate 3 different 300MHz clocks. I’m trying to use the HSMC port (with a HSMC-SMA adapter board). Based on the information in the schematics, the HSMC port must be connected to the transceivers(bank 2BL on the FPGA).

I’m assigning HSMC_TX_P1 to Pin_H4 of the FPGA. Similarly, other pins will follow. However, when I compile, I keep getting error messages regarding bank B2L not being able to support the required termination setting.

e.g.
“Error (169033): I/O pin HSMA_TX_P4 with Termination logic option setting Series 50 Ohm without Calibration cannot be placed inside I/O Bank B2L because the I/O bank does not support the requested Termination setting”

I have changed the I/O standard to LVDS, 1.5PCML and all others in the list. I keep getting the same errors. Does this mean that transceivers on the Cyclone V SoC cannot actually be used using the HSMC interface?

0 Kudos
10 Replies
CheePin_C_Intel
Employee
496 Views

Hi,


As I understand it, you have some inquiries related to the CV SOC pin placement. As I look into your description, the following are some comments requiring your attention:


1. As I looked into the CV SOC devkit schematic (rev E), it seems like the CV pin H4 (XCVR TX) is connected to HSMA_TX_P3 but not HSMA_TX_P1. Would you mind to double check on this?


2. Regarding the error on series 50 Ohm termination, for your information, this termination is only for GPIO but not for transceiver IO. It is recommended for you to let Fitter auto-assign the IO standard and termination after you specify the pin location.


Please let me know if there is any concern. Thank you.


hv2220
Beginner
481 Views

How do I let fitter automatically assign the IO standard and termination after specifying the pin location?

 

CheePin_C_Intel
Employee
470 Views

Hi,


In your assignment Editor, you only specific the pin location for the transceiver pin. Then run the Fitter compilation. You can check the assigned IO standard and termination at Fitter report.


Please let me know if there is any concern. Thank you


hv2220
Beginner
461 Views

I did what you said (with regards to pin assignments).  However, I'm still getting the same error.

 

Also, according to the pinout, Pin (P4-P3), (M4-M3) seem to be dedicated to transceivers(according to the the schematic and what quartus is showing).

 

I'm also attaching the schematic file and the project. 

 

I just need to generate 3 clock signals from this FPGA, with each clock having 33% duty cycle and a phase difference of 33% from one another 

 

I'm attaching my project as well.

CheePin_C_Intel
Employee
447 Views


Hi,


As I understand it from your initial post, you are referring to FPGA pin H4 which is the GXB_TX_L8p of the device. This is a XCVR channel.


Based on your latest post, please correct me if I am wrong, as I understand it, you just want to output a clock but not using transceiver channel. For your information, XCVR pins are dedicated for XCVR usage only but not normal GPIO.


For clock output purpose ie from IO PLL output, you can try to assign to FPGA pin AG2 which corresponds to HSMA_CLK_IN_P1.


Please let me know if there is any concern. Thank you.


CheePin_C_Intel
Employee
444 Views

I have tested assigning clkout_1500_2 in your design to pin AG2. The Fitter compilation can pass.


hv2220
Beginner
431 Views

 Pin AG2 is connected to HSMA_CLK_IN_P1). Isn't this supposed to be an input pin.

I will need 3 clock outputs (staggered with 33% duty cycle).  I'm trying to use an HSMC-SMA adapter board.  But based on the schematic of this adapter board, the SMA outputs(J17, J21, J25)   are only connected to HSMC pins  which are connected to Pin pairs (HSMC_TX_P1/N1, HSMC_TX_P2/N2, HSMC_TX_P3/N3). If these HSMC pin pairs are dedicated to transceivers on the FPGA, is there any other way I can extract the 3 clock signals out of the board(preferably via connectorzied outputs).

CheePin_C_Intel
Employee
421 Views

Hi,


As I understand it, pin AG2 is DIFFIO_TX_B16p. It is recommended for you to cross check with you HSMC to SMA card schematic to clarify. If this is an input, then you may trace from your HSMC to SMA card on the compatible pin for clkout.


Note that if your HSMC to SMA card only have the SMA routed to the transceiver channels, you might need to look for other card with the right routing for your target application.


Please let me know if there is any concern. Thank you.



Best regards,

Chee Pin



CheePin_C_Intel
Employee
356 Views

Hi,


Just to follow up with you on this. Thank you.


CheePin_C_Intel
Employee
349 Views

Hi,


As I understand it, it has been some time since I last heard from you. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


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