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Interrupts and RTOS on NiosII

Altera_Forum
Honored Contributor II
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Hi, 

I'm using the Cyclone III NiosII Embedded Evaulation Kit (NEEK) as a basis for a custom embedded processor design. When using the uC RTOS (necessary for use with the Altera Triple speed Ethernet soft MAC core), is it still possible to service an external interrupt (generated on a regular basic - say every 250usec) with minimal latency? 

 

Tim
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Altera_Forum
Honored Contributor II
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F.Y.I. You don't have to use uCOSII in order to use the TSE MAC. We currently use the MAC without an RTOS. The interniche stack requires a small amount of tweaking to allow it to run in superloop mode. 

 

Jake
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Altera_Forum
Honored Contributor II
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What is 'superloop mode' and is it relatively easy to use the MAC without an RTOS? 

Tim
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Altera_Forum
Honored Contributor II
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With an RTOS, you use task scheduling to ensure that tasks run at appropriate timer intervals. This is how the InterNiche stack is used with uCOSII. Task scheduling ensures that incoming IP packets are serviced in a timely manner. 

 

In superloop mode, there is no real task scheduler. Instead, you simply run the InterNiche stack's service routine during your main program loop. There is a timer interrupt that actually forces the Stack to do some updating. 

 

You can actually get higher performance from the superloop method. Obviously you just have to make sure that you are not blocking the loop for too long and thus preventing the stack from having the opportunity to service packets. 

 

I have not yet examined the TSE MAC driver in 8.0. But in 7.2 it was extremely easy to use the MAC in superloop mode. All you had to do was comment out the "#include" directives for UCOSII files. The actual interniche stack that Altera provides requires a little more work. You can find the information you need on the NIOS forum. 

 

Jake
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Altera_Forum
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--- Quote Start ---  

Hi, 

I'm using the Cyclone III NiosII Embedded Evaulation Kit (NEEK) as a basis for a custom embedded processor design. When using the uC RTOS (necessary for use with the Altera Triple speed Ethernet soft MAC core), is it still possible to service an external interrupt (generated on a regular basic - say every 250usec) with minimal latency? 

 

Tim 

--- Quote End ---  

 

 

Yes it is possible to service an external interrupt. I have used alt_irq_register () call to register external interrupts (please note that you must experiment with the interrupt width to arrive at an appropriate width to register the irq). The control is then transferred to the ISR.
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