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AEsqu
Novice
341 Views

Is Signal probe option not available within Quartus 19.3 pro? I used it in the past as explained by an Altera Engineer, but can't find it anymore. https://www.youtube.com/watch?v=20WwtqaA1dY

 
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11 Replies
70 Views

Hi, you can refer to the document below on the guidelines in using the signal probe:

Intel® Quartus® Prime Pro Edition User Guide: Debug Tools

 

Let me know if it helps.

AEsqu
Novice
70 Views

Thanks Richard.

So the GUI has been removed and I will have to edit the qsf or tcl.

Any reason why the GUI was removed?

 

AEsqu
Novice
70 Views

Richard,

I followed the doc and this seems to be not supported anymore (CONNECT_SIGNAL_PROBE_PIN is not in the list anymore):

 

In .qsf:

set_global_assignment -name CREATE_SIGNALPROBE_PIN kaya_r_io_D1

 

in quartus .tcl:

set_instance_assignment -name CONNECT_SIGNAL_PROBE_PIN kaya_r_io_D1 -to rfd_ic_i|u_top|u_core|u_atlas|A_flexcomm_array[3].A_flexcomm|A_flexcomm|A_minuart_gen.A_minuart_core|div_inst|clk_div_inst|z_mux_inst|z

ERROR: Illegal assignment name: CONNECT_SIGNAL_PROBE_PIN. Specify a legal assignment name. To view the list of legal assignment names, run "get_all_assignment_names".

get_all_assignment_names

BDF_FILE

VECTOR_TEXT_FILE

TEXT_FILE

VHDL_FILE

GDF_FILE

AHDL_FILE

INCLUDE_FILE

VERILOG_FILE

SYSTEMVERILOG_FILE

VERILOG_INCLUDE_FILE

VQM_FILE

EDIF_FILE

C_FILE

CPP_FILE

CPP_INCLUDE_FILE

CUSP_FILE

DSPBUILDER_FILE

ASM_FILE

HEX_FILE

VCD_FILE

MIF_FILE

VECTOR_WAVEFORM_FILE

ZIP_VECTOR_WAVEFORM_FILE

BSF_FILE

SYM_FILE

VECTOR_TABLE_OUTPUT_FILE

LMF_FILE

TCL_SCRIPT_FILE

QUARTUS_STANDARD_DELAY_FILE

QUARTUS_SBD_FILE

QUARTUS_PTF_FILE

CDF_FILE

...

AEsqu
Novice
70 Views

Ok the doc needs some update, this below was accepted:

 

set_instance_assignment -to kaya_r_io_D1 -name SIGNALPROBE_SOURCE rfd_ic_i|u_top|u_core|u_atlas|A_flexcomm_array[3].A_flexcomm|A_flexcomm|A_minuart_gen.A_minuart_core|div_inst|clk_div_inst|z_mux_inst|z

 

All signalprobe accepted keywords from the list:

SIGNALPROBE_ALLOW_OVERUSE

SIGNALPROBE_CLOCK

SIGNALPROBE_NUM_REGISTERS

SIGNALPROBE_SOURCE

SIGNALPROBE_ENABLE

SIGNALPROBE_DURING_NORMAL_COMPILATION

 

 

AEsqu
Novice
70 Views

Great, quartus crashes during rapid recompile ...

 

last messages before the crash:

 

 

Info(20273): Intermediate fitter snapshots will be committed because Early Place is being enabled during compilation. 

Info(20274): Successfully committed planned database. 

Info(12517): Periphery placement operations ending: elapsed time is 00:02:49 

Warning(15705): Ignored locations or region assignments to the following nodes 

Warning(15706): Node "clk_a10_0" is assigned to location or region, but does not exist in design 

Warning(15706): Node "clk_a10_1" is assigned to location or region, but does not exist in design 

Warning(15706): Node "kaya_r_io_C10" is assigned to location or region, but does not exist in design 

Warning(15706): Node "kaya_r_io_C13" is assigned to location or region, but does not exist in design 

Warning(15706): Node "kaya_r_io_C14" is assigned to location or region, but does not exist in design 

Warning(15706): Node "kaya_r_io_C15" is assigned to location or region, but does not exist in design 

Warning(15706): Node "kaya_r_io_C16" is assigned to location or region, but does not exist in design 

Warning(15706): Node "kaya_r_io_C17" is assigned to location or region, but does not exist in design 

Warning(15706): Node "kaya_r_io_C18" is assigned to location or region, but does not exist in design 

Warning(15706): Node "kaya_r_io_C9" is assigned to location or region, but does not exist in design 

Info(11165): Fitter preparation operations ending: elapsed time is 00:02:04 

 

 

 

Problem Details

Error:

Internal Error: Sub-system: VPR20KMAIN, File: /quartus/fitter/vpr20k/bsyn_interface/bi_bsyn.cpp, Line: 480

enabled

Stack Trace:

  0x44951d: BSYN_CONFIG::BSYN_CONFIG(BSYN_FLOW_TYPE) [clone .cold.1340] + 0x75 (fitter_vpr20kmain)

  0x7ab232: BSYN_CONFIG::Init(BSYN_FLOW_TYPE) + 0x62 (fitter_vpr20kmain)

  0x7b403: FDRGN_EXPERT::run_vpr(bool, bool, bool, bool, BSYN_FLOW_TYPE) + 0x163 (fitter_fdrgn)

  0x882fb: FDRGN_EXPERT::early_place() + 0x7b (fitter_fdrgn)

  0x2a44f: fit2_fit_early_place_auto + 0xe9 (comp_fit2)

  0x4c942: TclNRRunCallbacks + 0x42 (tcl8.6)

  0x13d7f: fit2_fit_early_place + 0x2b9 (comp_fit2)

  0x4c942: TclNRRunCallbacks + 0x42 (tcl8.6)

  0x4de7b: TclEvalEx + 0x68b (tcl8.6)

  0xf3f0e: Tcl_FSEvalFileEx + 0x25e (tcl8.6)

  0xf3ffe: Tcl_EvalFile + 0x2e (tcl8.6)

  0x14916: qexe_evaluate_tcl_script(std::string const&) + 0x44c (comp_qexe)

  0x19a1c: qexe_do_tcl(QEXE_FRAMEWORK*, std::string const&, std::string const&, std::list<std::string, std::allocator<std::string> > const&, bool, bool) + 0x417 (comp_qexe)

  0x1a9d5: qexe_run_tcl_option(QEXE_FRAMEWORK*, char const*, std::list<std::string, std::allocator<std::string> >*, bool) + 0x558 (comp_qexe)

  0x3922e: QCU::DETAIL::intialise_qhd_and_run_qexe(QCU_FRAMEWORK&, FIO_PATH const&, std::string const&, std::string const&, char const*, std::list<std::string, std::allocator<std::string> >*, bool) + 0xed (comp_qcu)

  0x41d1c: qcu_run_tcl_option(QCU_FRAMEWORK*, char const*, std::list<std::string, std::allocator<std::string> >*, bool) + 0x259 (comp_qcu)

  0x1d69e: qexe_standard_main(QEXE_FRAMEWORK*, QEXE_OPTION_DEFINITION const**, int, char const**) + 0x6a0 (comp_qexe)

  0x4032f2: qfit2_main(int, char const**) + 0x92 (quartus_fit)

  0x3ef00: msg_main_thread(void*) + 0x10 (ccl_msg)

  0x41114: msg_thread_wrapper(void* (*)(void*), void*) + 0x6e (ccl_msg)

  0x11f0c: mem_thread_wrapper(void* (*)(void*), void*) + 0x5c (ccl_mem)

   0xc728: err_thread_wrapper(void* (*)(void*), void*) + 0x27 (ccl_err)

   0x6d85: thr_thread_wrapper + 0x15 (ccl_thr)

  0x41c90: msg_exe_main(int, char const**, int (*)(int, char const**)) + 0x148 (ccl_msg)

  0x1ed5d: __libc_start_main + 0xfd (c)

  0x402ae5: (quartus_fit)

 

End-trace

 

 

Executable: quartus

Comment:

None

 

System Information

Platform: linux64

OS name: Red Hat

OS version: 6

 

Quartus Prime Information

Address bits: 64

Version: 19.3.0

Build: 222

Edition: Pro Edition

 

 

I will try with a full compilation and the command in the qsf:

 

set_global_assignment -name CREATE_SIGNALPROBE_PIN kaya_r_io_D1

 

set_instance_assignment -name SIGNALPROBE_SOURCE rfd_ic_i|u_top|u_core|u_atlas|A_flexcomm_array[3].A_flexcomm|A_flexcomm|A_minuart_gen.A_minuart_core|div_inst|clk_div_inst|z_mux_inst|z -to kaya_r_io_D1

 

 

70 Views

Hi, you can use the example below to test the Signal probe flow. You can then modify the example to debug your current projects.

Example of Using Signal Probe Routing Feature

70 Views

I do not know the exact reason why the GUI was removed. If GUI is more convenience, I can send a request to the engineering team to add this feature in the future Quartus version.

AEsqu
Novice
70 Views

That's ok, I will edit the qsf file directly now, using the node finder gui to find the points to probe out.

70 Views

Hi, do you need further help with the signal probe?

AEsqu
Novice
70 Views

Hi Richard,

no, but I would like Intel to update the documentation, it is outdated and incorrect, as I mentioned before.

Have a great Holiday ;-)

70 Views

Thanks for the constructive feedback. We will review and update the document.

Happy holiday to you too. :)

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