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Issue with CMX DMA with Baremetal on Myriad 2 development kit

SBaks5
Beginner
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Hello,

I have a Myriad 2 development board with MA2450. I'm trying to use the CMX DMA interface for data transfers from DRAM to CMX and back using the Baremetal paradigm (not RTEMS) from the LEON core.

 

I have tried both the new(DrvCdma.h) and old(DrvCmxDma.h) CMX DMA drivers. I can initialize DMA, create a transaction and start that transaction. However, my code gets stuck in the "DrvCmxDmaWaitTransaction" call. 

 

I can run the examples from MDK that use CMX DMA with RTEMS paradigm without any trouble. I've compared my code to other examples to make sure i'm not missing anything (like enabling clocks etc.) and made changes accordingly, but no success.

 

My environment:

Windows 10

Cygwin-32 bit

MDK_release_18.08.10_general_purpose

 

Attached is a sample code that i use to test the CMX DMA engine.

 

I would really appreciate any help on this. Thanks!

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Luis_at_Intel
Moderator
602 Views

Hi @SBaks5​ ,

 

I apologize for the delay in my response, thank you for clarifying. Unfortunately this product is not supported out of this forum, please check your Messages as have sent you a private message with more information.

 

 

Regards,

@Luis_at_Intel​ 

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Luis_at_Intel
Moderator
602 Views

Hi @SBaks5​ ,

 

Thanks for reaching out. We are currently looking at your request and are hoping to have a response from the appropriate team. May I ask which development board are you using? I will get back to you as soon as I have something to share, thank you for being patient.

 

 

Regards,

@Luis_at_Intel​ 

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SBaks5
Beginner
602 Views

Hi @Luis_at_Intel​  thanks for your reply, i am using Myriad 2 development board with the MA2450 SoC. Please let me know if any information is required.

 

Thanks!

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Luis_at_Intel
Moderator
603 Views

Hi @SBaks5​ ,

 

I apologize for the delay in my response, thank you for clarifying. Unfortunately this product is not supported out of this forum, please check your Messages as have sent you a private message with more information.

 

 

Regards,

@Luis_at_Intel​ 

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