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Hi!
Today I'm creating project Arria 10 EMIF for DDR4 LRDIMM (MTA72ass8g72lgz-2g3 of Micron). Previous projects for ddr4 worked fine. i created example design in ip core and he worked. This is example gives an error in "EMIF Toolkit". See the picture "error_cmd_master_read_32". Parameters of IP core for my project see pictures also.
Help me!! I don't see errors. Why is it not working?
- Tags:
- DDR4_LRDIMM
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Does your design have multiple DDR4 design daisy chained ?
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