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Valued Contributor III
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Loan IO in Qsys/Quartus 2

Hello everybody, 

 

I am currently building a soft processor system on Altera DE1-SoC Cyclone V board. For my system to work as intended it must have access to the SD card slot and to the external uart-usb port, but seeing those two elements are situated on the HPS part of the chip, as opposed to the FPGA part where my processor is, I have encountered some problems.  

 

I would like to know what exactly are the steps to access this pins. I suppose the way to go is through "loan IO" in QSYS but I do not fully understand what I am to do to make it work as intented (I am a begginer with DE1,Quartus II and QSys ).(I am using Quartus II 14.1) 

 

I got from http://www.alteraforum.com/forum/showthread.php?t=44486 the basics of it but it still does not work. 

 

-Is the memory conduit in the hps block in qsys needed and if so, how must it be connected seeing I do not really have use for it. 

 

-For example if I want to access UART-usb pins (by bypassing everything in HPS , because my uart controller is on the FPGA part) is the correct procedure in QSys to add a HPS block(set all controllers to unused), create the correct loan IO lines and export hps_io, h2f_loan_io and memory conduits. When you get the HDL you put it in your block design file and connect it. Is this it or am I missing something? Must I maybe add an UART block in Qsys or is that only if I want to use the integrated(hard logic) uart controller?  

 

-After I generate a HDL in QSys I must run a bunch of TCL scripts which automatically connect my outputs and inputs to correct pins. Is this correct? Otherwise there is no way I could connect my LOAN IO pins, as pin planner will not let me. 

 

-Clock. I have a global clock running my FPGA system. Is the correct procedure to connect the same clock to the created Qsys HDL symbol? 

 

 

Anyhow my goal is simply to grab the wires that connect directly to SD and Uart-usb, and completely nothing inbetween, no controllers, no buffers, no nothing. 

 

Thanks in advance. Any kind of help will be appreciated. 

 

Best regards
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Highlighted
Valued Contributor III
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--- Quote Start ---  

Hello everybody, 

 

I am currently building a soft processor system on Altera DE1-SoC Cyclone V board. For my system to work as intended it must have access to the SD card slot and to the external uart-usb port, but seeing those two elements are situated on the HPS part of the chip, as opposed to the FPGA part where my processor is, I have encountered some problems.  

 

I would like to know what exactly are the steps to access this pins. I suppose the way to go is through "loan IO" in QSYS but I do not fully understand what I am to do to make it work as intented (I am a begginer with DE1,Quartus II and QSys ).(I am using Quartus II 14.1) 

 

I got from http://www.alteraforum.com/forum/showthread.php?t=44486 the basics of it but it still does not work. 

 

-Is the memory conduit in the hps block in qsys needed and if so, how must it be connected seeing I do not really have use for it. 

 

-For example if I want to access UART-usb pins (by bypassing everything in HPS , because my uart controller is on the FPGA part) is the correct procedure in QSys to add a HPS block(set all controllers to unused), create the correct loan IO lines and export hps_io, h2f_loan_io and memory conduits. When you get the HDL you put it in your block design file and connect it. Is this it or am I missing something? Must I maybe add an UART block in Qsys or is that only if I want to use the integrated(hard logic) uart controller?  

 

-After I generate a HDL in QSys I must run a bunch of TCL scripts which automatically connect my outputs and inputs to correct pins. Is this correct? Otherwise there is no way I could connect my LOAN IO pins, as pin planner will not let me. 

 

-Clock. I have a global clock running my FPGA system. Is the correct procedure to connect the same clock to the created Qsys HDL symbol? 

 

 

Anyhow my goal is simply to grab the wires that connect directly to SD and Uart-usb, and completely nothing inbetween, no controllers, no buffers, no nothing. 

 

Thanks in advance. Any kind of help will be appreciated. 

 

Best regards 

--- Quote End ---  

 

 

Hi, 

 

So this post is already past 2 years with no response. In any case, I am in a similar situation as you described. So, would like to know if you were able to find a solution for yourself. If so, kindly share the procedures. 

 

Thanks. Your response would be very much appreciated.
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