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I see that the Stratix IV GX development kit with EP4SGX230KF40C2N FPGA is compliant to PCI Express 2.0 x8 (eight lane). Given that each PCIe 2.0 lane can transfer 500 MB/s, eight lanes in aggregate should be able to transfer 4 GB/s (yes, Giga Bytes per second). Therefore, I'm assuming that this means that the development board/FPGA can receive data at this rate (4 GB/s).
Questions: 1. Is the above a correct assumption? 2. Are there any benchmark studies (white papers, etc.) illustrating actual high-speed data transfer rates (please send a link)? 3. Is there a PCIe "core license" I need to purchase? 4. Is there a particular Quartus license I need to purchase (and what's the cost)? I need feedback before I make a purchase for my group. Thanks, Eric J. Harris Electronics Engineer NASA GSFC 301-286-3439 eric.j.harris@nasa.govLink Copied
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The PCI-E resource center on Altera's website:
http://www.altera.com/support/ip/interface-protocols/ips-inp-pcie.html?gsa_pos=2&wt.oss_r=1&wt.oss=pci%20express The achievable bandwidth is highly dependent on your design. This reference design document has some benchmark results with explanations about bandwidth calculations and theoretical limits: http://www.altera.com/literature/an/an456.pdf Jake- Mark as New
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Oh and as far as licensing the cores and software, talk to your local Altera sales rep.
Jake- Mark as New
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Perfect, just the information I was looking.
Thanks Jake, Eric
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