MAX 10 FPGA - power supply with plateau

[ericmtzr]

We are using the MAX 10 FPGA and came across an ominous message in the configuration guide regarding monotonic power ramp. Here is the statement in the m10_datasheet-683794-666319.pdf:

Recommended Operating Conditions
This section lists the functional operation limits for the AC and DC parameters for Intel MAX 10 devices. The tables list the
steady-state voltage values expected from Intel MAX 10 devices. Power supply ramps must all be strictly monotonic, without
plateaus.

What is the impact if there is a plateau?

[Farabi]

Hello, 

The impact if the power ramp up is not monotonous is POR circuit will not release the device out from reset mode to enter next mode which is configuration mode. 

If device in reset mode, it will keep redoing the power cycle until the power ramp up is monotonous. 

regards,
Farabi

[Farabi]

Hello, 

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

regards,

Farabi