FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5239 Discussions

MAX V CPLD power supply leakage voltage

YKono1
Beginner
349 Views

I have a question about the power supply of MAX V CPLD.

 

MAX V uses 3.3V and 1.8V power supplies.

Since there is no order in the power supply, 3.3V is input first.

There is less than 1V leakage voltage before 1.8V input.

Does MAX V CPLD cause leakage voltage?

 

Thank you.

that's all

0 Kudos
1 Reply
Rahul_S_Intel1
Employee
111 Views

Hi ,

There is not characterized data for the leakage voltage, only leakage current is provided in the data sheet

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-v/mv51003.pdf

 

Page : 3

 

Reply