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FPGA Evaluation and Development Kits

MAX V GPIO headers

Honored Contributor II

On the MAXV DK,  


header A has pins denoted; 

5VIN_CONN (j6.11), GND (j6.12, j6.30), 3.3VIN_CONN (j6.29) 


header B has pins denoted; 

5VIN_CONN (j7.11), GND (j7.12), 3.3VIN_CONN (j7.29), GND (j7.30) 


What is the purpose of these pins?, are they outputs or do they need to be supplied externally from a psu? 


If they need to be supplied, then how are they used on the board? (as regards which IO's are powered from them).
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