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I want to make VHDL master code for extracting adc data from the modular adc core ( standard sequencer with external sample storage) and send out the response data through a digital pin.
Is there any example VHDL code or reference design there for establishing Avalon MM interface between the MAX10 Internal ADC and another VHDL master ?
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Hello,
I only have this tutorial video link : https://www.youtube.com/watch?v=u7y5ZR1E8SU
This video will take you through the steps to use the MAX 10 ADC’s “Standard Sequencer with External Storage” mode for exporting the adc conversion data to the core for post-processing.
regards,
Farabi
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