MAX10 series -10M02SCE144I7G FPGA powered from 3.3V on all IO's will support open drain 1.05V input ?

[KMANO3]

in our system we have a processor input signal voltage level of 1.05V connected to the FPGA i/o which is in 3.3V power rail.

can FPGA detect logic values from 1.05V or , does it require a separate power for the i/o bank ?

Please provide your valuable feedbak.

[Rahul_S_Intel1]

Hi Kumaran,

Please note that for the IO to detect values there need to analysis

One is : I/O standard

Second one VIL and VIH

Page no: 19

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/m10_datasheet.pdf

Please make sure that the above parameters is matching.