12-09-2015 08:24 AM
Check out the following links for the Max 10 IO models:IBIS model - www.altera.com/support/support-resources/download/board-layout-test/ibis/ibs-ibis_index.html Hspice model - www.altera.com/support/support-resources/download/board-layout-test/hspice.html
12-09-2015 02:28 PM
--- Quote Start --- Is there a way to test DDR3 signal integrity on the Max 10 dev kit? I'm wondering if these signals are accessible anywhere. --- Quote End --- Mind further elaborate on the signal integrity that you would like to test? Is it that you are trying to measure the eye?