Max II dev kit

[Altera_Forum]

Could anybody provide a small working design of the SRAM read/write (Cypress 1019cv33) for the MAX II CPLD. I went according to the reference designs and mine did not work, so i wanted to know if anybody has written a small example or program which works so that i can test it on my CPLD. 

 Thanks, NEO

[Altera_Forum]

Hello, 

 I have found the solution to the problem. If anyone faces the same issue. I would suggest try checking the project settings. (right-click on the project -> settings-> device and pin options) and change the default setting for "Device and Pin options -> unused pins" from output driving ground to input tri-stated or input with bus-hold circuitry and everything will work just fine.  :) Thanks to hank from altera support for pointing this out  -neo