FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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Max V Clocks

Honored Contributor II

When using the Max V CPLD Dev Board, is there access to use the on board clocks as a resource? 


There's a 10MHz (MaxV clock), 6MHz (usb) and a 24MHz xtal on the board, but I dont see these appearing anywhere in the documentation as clocks that can be used. 


I can always connect an external clock connection but seems odd the ones already there cant be used.
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Honored Contributor II

The reference manual clarifies that the 10 MHz clock is directly driving the MAX V but doesn't list the pin number. 


The information can be found however both in the schematic diagram as well as in the pin assignments of the example designs. 


set_location_assignment PIN_H5 -to CLK_SE_AR