FPGA, SoC, And CPLD Boards And Kits
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Maximum input clock frequency for DDR3 controller in Cyclone V GT demo board

Altera_Forum
Honored Contributor II
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Hi all, 

 

Can use a 200 MHZ clock with the Cyclone V GT uni-phy hard memory controller. I am hoping to get the data into the memory faster if I can run the interface at a higher rate. 

 

I will still run the core at 300 MHZ, but I want to run the ref clock at 200MHz. Does anyone know if this can be done? 

 

Thanks, 

Fly-Guy
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Altera_Forum
Honored Contributor II
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Haven't checked this out personally but i guess best way to verify 100% is just to come up with a simple design and quickly do the assignments to see if the board can handle the settings, =)

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