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Altera_Forum
Honored Contributor I
765 Views

MyFirstFPGA on Stratix II PCI Express Dev Kit

Hi I am new to FPGA world and sorry if I am asking silly questions. 

 

I am trying to run MyFirstFPGA tutorial on Stratix II PCI express dev kit 

I followed every step specified on the tutorial and configured PIN's as per given in user manual. 

 

Using Quartus II - 9.1v 

Clk - 100MHz on Pin - PIN_A20 

LED[3..0] - AR33, AP30, AT32, AP31 

button - D37 

 

When I changed CLK IO type to LVDS. There is a new pin created with 

oss_clk(n) and got asigned to pin A21. I donno if that is an issue. No mater what I do it is there. 

 

I donno some how when I download compiled "sof" file all LED's on board are lighting up. 

 

I even tried removing PLL and directly connecting to clk to simple counter but same effect. 

 

I downloaded myFirstFPGA "SOF" file provided with board CD and it works as expected. Any tips or available project source would be great. 

 

Thanks in advance
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Altera_Forum
Honored Contributor I
59 Views

I can answer one of your questions quickly. For the rest, I am not familiar with that specific board. 

 

Each time you use differential signaling such as LVDS, you need two signals: p and n. Quatrus II will automatically generate the extra signal when you select a diff sig standard. You should always use differential signaling when you can. Make sure however that a differential clock generator is actually used to drive those pins. Look at the schematics and search for those pins and see how they are connected.
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