NIOSII altera_epcq_controller v15.1 - Stuck in ALTERA_EPCQ_CONTROLLER_INIT with debug

[Arthur_Davidov]

Hi,

I face with a problem that during running debugger (blaster) the processor is stuck in where try to " read EPCQ_RD_RDID for the silicon ID":
silicon_id = IORD_ALTERA_EPCQ_CONTROLLER_RDID(flash->csr_base);

The address is valid, but when suspending the debugger right before this line execution and try to read from 'Memory Monitor', I receive an error that address isn't valid.

This situation doesn't occur if I program the ".jic" file of the same solution.

Thanks,
Arthur D.

[BoonBengT_Intel]

Hi @Arthur_Davidov,

Thank you for posting in Intel community forum and hope this message find you well.
Upon generating the jic file you should have an output.jic and an output.map file created. Check the output.map file and it will tell you the EPCQ addresses of the sof and hex files. Check if the hex file starts right after the sof file. (e.g. the sof is 0x000 - 0xAAA, the the hex file should start with 0xAAB)

I believe that you might have build the jic correctly, but here are also some good references of the steps to create the jic files.

Note: More details explanation of the address can be found in the following user guide under 'Nios II Processor Application Copied from EPCQ Flash to RAM'

Warm regards.

[BoonBengT_Intel]

Hi @Arthur_Davidov,

Hope this message find you well, by any chances did you managed to look into the proposed recommendation steps above and does  it work?

Warm regards.

BB

[BoonBengT_Intel]

Hi @Arthur_Davidov,

Hope this message find you well and good day, as we do not receive any response from you to the previous clarification that we have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions. 

Warm Regards

[Arthur_Davidov]

Hi,
The problem was that EPCQ clock was disabled.