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Altera_Forum
Honored Contributor I
724 Views

Need for two different I/O voltages on the same bank

I guess there's no solution for that, but I wanted to give a try anyway. So my situation is below. 

 

I'm using DE2-115 together with a Terasic LTM module on the GPIO port and a Texas Instruments acquisition evaluation module on the HSMC port. 

 

LTM module uses a 3.3 V I/O standard, or at least I'm supposing it, since its user manual doesn't mention it explicitly, but it seems to use a 3.3 V power supply (anyway it's already working with 3.3 V I/O, so I'm pretty sure about that's its standard). So I had to set my JP6 jumper in the 3.3 V correspondent position.  

 

At the same time, I would need a 1.8 V clock signal on the SMA out connector to use with the TI EVM. Unfortunately, the FPGA pin connected to the SMA_CLKOUT is on the same bank of GPIO pins (bank 4), so I'm actually having a 3.3 V I/O standard on it. 

 

Is there anything I can try to overcome the problem? What would you do? 

 

Regards, 

Lorenzo
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2 Replies
Altera_Forum
Honored Contributor I
43 Views

 

--- Quote Start ---  

What would you do? 

 

--- Quote End ---  

 

 

A 50-ohm source termination and a 50-ohm end termination create a voltage divider 50/(50+50)* 3.3V = 3.3V/2 = 1.65V. 

 

Viola!  

 

A 1.65V clock should work fine with 1.8V logic. 

 

Cheers, 

Dave
Altera_Forum
Honored Contributor I
43 Views

Ok Dave, now I'm a fan of yours :)  

Thank you. 

 

Cheers, 

Lorenzo
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