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Nios II reference design for Cyclone V GX+ HSMC-DVI from terasic

Honored Contributor II

Hi to all members of the community, 


I would appreciate it if someone could provide a reference design that uses Nios II and possible Altera's Video Image Processing Suite (vip suite) implemented for Cyclone V GX dev kit + HSMC-DVI from terasic. I want to start working on this, implementing my own Avalon-ST IPs but i cannot find a reference design anywhere that uses nios II+ ddr frame buffer... The loopback designs provided by terasic for using the HSMC-DVI daughter-card do not use at all nios II or ddr3. It is really a bummer since it will take me forever to build a the hardware/software design from scratch... I could also use a design without nios ii but with a ddr3 controller for video frame buffer ... Any help would be deeply appreciated... 


Thank you very much for any response 

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