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Altera_Forum
Honored Contributor I
716 Views

Open PCI Express Avalon-ST reference design(13.1) with Quartus 14.0

Hi, all, 

 

has anyone ever tried to open the PCI Express Avalon-ST reference design in Quartus 14.0? 

 

The reference design targeting Cyclone V GT kit was generated in Quartus 13.1. When opening the design in Quartus 14.0, the following 3 IPs need to be upgraded but failed to do so: 

 

1). alt_xcvr_reconfig 

2). altera_reset_controller 

3). altera_pcie_cv_hip_ast 

 

Therefore I could not proceed with the design in Quartus 14.0? How can I upgrade the IPs or any workaround exists? 

 

Thanks. 

 

Jeff
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4 Replies
Altera_Forum
Honored Contributor I
24 Views

Usually I do not trust this upgrade, I had it fail a few times. I just wrote down the parameters and created new copies. You should be able to create just the PCIE IP and the rest should come with it in the example.

Altera_Forum
Honored Contributor I
24 Views

Altera switched to the QSYS and deprecated the Megawiz (rest in peace old friend....). Some cores, such as the PCIe core...have to be regenerated from scratch in the 14.0 IP Catalog. Most cores like the LPM library, RAM blocks, etc will upgrade easily in the 14.0. PCIe needs to be rebuilt....so its a bit manual...write down the parameters, open the IP catalog and build the core from scratch.

Altera_Forum
Honored Contributor I
24 Views

Rather than writing the PCIe core parameters down, you can convert the .qsys XML file to Tcl, and have "software" write the parameters down for you ... 

 

http://www.alterawiki.com/wiki/qsys_scripts 

 

You can use this script to generate a Tcl equivalent of your Qsys system, and then have that Tcl decide what parameters to include, eg., create a .qsys file for 14.0 or 13.x, taking care to only include parameters expected by that version of Quartus. 

 

The fact that you can do this leads to the obvious question; Why did Altera use XML for .qsys files, when they could have just used Tcl? 

 

Cheers, 

Dave
Altera_Forum
Honored Contributor I
24 Views

Hi, All, 

 

thanks a lot for your inputs.  

 

As suggested by "glennramalho" and "thickjohnson" I re-generated the PCIe design in 14.0, however the 'altera_pcie_cv_hip_ast' IP is no longer available in 14.0. I have to leave it out. 

 

@Dave, I would like to try it out. Nice tip. 

 

bests, 

jeff
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