08-16-2013 12:12 PM
Hi all,I'm new in PCIe developing and want your help. I'm using DB4CGX15 evaluation board from DevBoards. I need to transfer data from outside to PC. The data is 32 bits width and clock is 85 MHz. Amount of data may vary from 150Mbytes up to unknown. DB4CGX15 is using PCIe x1 configuration, but the final project will support PCIe x2 Gen1.1. The main idea of the project is to use Hard IP core for PCIe and SGDMA with FIFOs. The QSYS system contains:
- PCIe IP core
- SGDMA (32bits) with enabled packet transfers
- Avalon-ST dual clock FIFO (32 bits) with packet transfers
- PIOs for registers (connected to BAR0)
- QSYS compiled block
- Dual clock FIFO for clock synchronization
08-19-2013 11:19 AM
--- Quote Start --- hmmm that's looks challenging so i'd like to search about it and let you know --- Quote End --- Thanks! I found documentation for Avalon-ST interface, all control signals are described there, but still not fully clear. I'm trying now to use Packet/Data/Channel ST adapters, i hope that it will help.
10-25-2013 02:39 PM
10-27-2013 08:25 AM
--- Quote Start --- When I try to compile PCIe32Bit_refdesign.qpf ( downloaded from www.devboards.de (http://www.devboards.de) and no changes made ) in Quartus 12.1 it produces an error: Error (12006): Node instance "iSOPC" instantiates undefined entity "sopc_test". What could be the cause of the problem? --- Quote End --- Hi, Recheck names of your instances. "sopc_test" instance is missing or has different names in declaration and file name. If you are trying to compile existing project (not your project), there is may be missing "sopc_test" folder. Dima.