FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5281 Discussions

PCIe freezes only when performing multiple back to back reads

Honored Contributor II

I have modified Altera's high-performance SDRAM reference design to issue commands and read back acquired data using Stratix II GX DK. Everything works fine when iteratively issuing commands and capturing data. But, when I try to issue command once and perform back-to-back multiple reads, PCIe freezes after a random number of operations. I used Jungo's debug monitor and found that for reason instead of unlocking the previously held handle, driver just keep locking a new handle indefintely. Has anyone seen this problem or has any suggestion on what could be going wrong? 


0 Kudos
0 Replies