PCIe hard IP simulation on Xcelium

[binupr]

Hi there,

I am creating a simulation script for simulating R-tile PCIe IP. I looked at the generated xcelium_setup.sh & xcelium_files.tcl and adding files from these to our own environment as it is not easy to directly port the Intel generated scripts to our environment.

I added all the files and I am using Cadence 'xrun' command. But I get below error for some encrypted modules (part of the log file attached as well). Any suggestions?

xmvlog: *E,BADBSE (Intel_Rtile_Pcie_Controller/intel_rtile_pcie_ast_1000/sim/cadence/virtio/rnr_pcie_virtio_cfg_access_cap.v): error within protected source code.

Thanks

Binu

[wchiah]

Hi,

FYI , Xcelium* simulator support is only available in devices with the suffix R2 or R3 in their OPN numbers.

You can follow the link below for the simulation procedure

https://www.intel.com/content/www/us/en/docs/programmable/683544/22-2-6-0-0/simulator-43921.html

Regards,

Wincent_Intel

[binupr]

Hi Wincent,

Confirming I am running simulations against AGIB027R29A1E2VR3 which is an R3 device. The issue I am referring to is related to encrypted IP sub-components. 

I will try the environment variable setting mentioned in the link to see if that does any trick.

Regards

Binu

[binupr]

Also looking at this xmvlog-E-ERRIPR-error-within-protected-source-code/m-p/1445308#M76746 I am confused as to whether xrun is supported in Quartus 23.2 generated IP files.

[wchiah]

Hi Binu,

I suggest you to regenerate a clean project and try it again.
Yes you can try to run https://www.intel.com/content/www/us/en/docs/programmable/683870/22-4/sourcing-cadence-simulator-setup-scripts.html

And see if you able to get it or not.

Regards,

Wincent_Intel

[binupr]

Hi Wincent,

Thanks.

I do not want to use the approach of sourcing of generated script as this does not fit into our simulation environment setup.

Hence calling the 'xrun' commands directly on the files. Do you know or can you check with the development team if 'xrun' call on the files (listed in xcelium_files.tcl) is a valid and Intel supported approach?

Regards

Binu

[wchiah · Accepted solution]

Hi Binu,

I have review the case with our Simulation Expert, unfortunately we do not support "xrun" utility, (though we do have xrun support in our roadmap).
this utility might be causing errors while compiling the libraries.
 
For now, we do support the multi-step flow where we compile the files first into designated libraries (using xmvlog), elaborate using xmelab and simulate using xmsim.
 
You can refer to any of our generated Xcelium scripts to see the commands, To generate the simulation scripts in Quartus click Tools -> Generate Simulator Setup Script for IP …
this option will generate several folders, you can open the xcelium folder to see the xcelium_setup.sh
(more info in this section from our documentation 1.5.3.2. Scripting IP Simulation)
 
here you can see how to use and source the generated script in the link below, in case you decide to use the generated script.
5.2. Sourcing Cadence Xcelium Simulator Setup Scripts
 
Alternately, you can run quartus eda simulation library compiler to generate xcelium script to compile the libraries.
Example , Here’s the command to generate xcelium script to compile Stratix 10 libraries for verilog:
quartus_sh --simlib_comp -tool xcelium -language verilog -family stratix10 -gen_only -cmd_file cmp.sh
(cmp.sh will contain the commands)

Regards,

Wincent_Intel

[wchiah]

Hi,

I wish to follow up with you about this case.

Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket

Regards,

Wincent_Intel

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

[binupr]

Hi Wincent,

Thank you for the follow-up. Good to get confirmation that xrun is not a supported flow from Quartus at this stage.

You can close this case.

Regards

Binu

[wchiah]

Hi

Thanks for confirming the answer.

Therefore following our support policy, I have to put this case in close status.

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If your support experience falls below a 9 out of 10, I kindly request the opportunity to rectify it before concluding our interaction. If the issue cannot be resolved, please inform me of the cause so that I can learn from it and strive to enhance the quality of future service experiences. 

Regards,

Wincent_Intel

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.