Hi,I have configured the PCIe megacore on Stratix II GX development kit for 8 lanes but when I plug it into the x16 slot of my PC (Dell Optiplex 775) it is configured only as a single lane device. I have confirmed it using x1 LED on board as well as some hardware scan utilities. I have also confirmed that PCIe slot is indeed capable of x16 operation by using a graphics card. I have tried installing both PCIe-DDR2 reference design image as well as my custom image based on the reference design, but in vain. I have also programmed the Flash memory with these images to ensure that FPGA is programmed as soon as the system boots up but it always ends up being configured as an x1 device. I would also like to know if there are any BIOS or software utilities which allow one to re-configure PCIe settings, such as 'Maximum read request size', which are used for fair bus usage but redundant in my settings where there is only 1 device on the bus. I would very much appreciate any pointers on how to resolve these issues, especially the x8 problem which is degrading the Altera design by more than an order of magnitude. Thanks
There should be a jumper on your development board which connects A11 of the card connector to one of the three prsnt pins. These pins are used by your computer to determine which lane width to use. Do you have it set correctly?
Thanks for the prompt reply. The kit I am using is: http://www.altera.com/products/devkits/altera/kit-pciexpress_s2gx.html. On it, pin A1 is PCIE_PRSNT1n, pin B48 is PCIE_PRSNT2n (internal signal: PRSNT2_N_X8), and pin A11 is PCIE_PERSTn. The remaining 2 internal signals, PRSNT2_N_X1 and PRSNT2_N_X4, are mapped to pins B17 and B31 respectively, which are left floating.According to the board schematics, pin A1 and B48 are connected together via a 0 ohm resistor (R43). I have verified it using a multimeter (approx 0.7 ohms). Do you mean I need to conenct PCIE_PERSTn (A11) to B48? I do not see any jumper on the board which allows me to do that.
No! Whoops! I looked too quickly at the board schematic (for the wrong board, the Arria GX, to boot) and mixed up PERSTN and PRSTN. If A1 and B48 are connected than your board is at least being represented to the computer as x8 compatible, and so the problem exists elsewhere. Unfortunately I have no idea. I knew the solution above would be a stretch, that you probably had it configured correctly. Something is going wrong during link initialization & training... maybe the test out signals can help you. There are a ton of outputs there that can be used to diagnose physical lane errors, based on training sequences and ltssm states.
Finally, I heard back from Altera Support that PCIe version 6.1 which I was using had a bug. They had asked me to try V8.1. I was going to try it even though tt is easily said than done due to my custom design but then Dell Support responded to my complaint confirming that their PCIe slot on their board supports only either x1 or x16 operation! Now, I guess I need to first look for a system which supports x8 and first try v 6.1 and if that does work then go on to v8.1 I will appreciate if anyone can share his/her experience in this regard.