Hi,I'm working with Stratix IV GX FPGA Development Kit. When I used HSMC port, there're some pins not configurable. I can set these pins as output pins in Quartus II, but their output level never change. For instance, AW6 --> always HIGH AW5 --> always HIGH AV5 --> always HIGH AW4 --> always LOW AR5 --> always LOW AT5 --> always LOW (... and there're much more) I've checked user manual but still got no idea. Any help or comment are appreciated. Thanks a lot.
--- Quote Start --- What are these pins connected to inside the FPGA? --- Quote End --- According to schematics, AW6 --> DIFFIO_RX_R12p AW5 --> DIFFIO_RX_R12n AV5 --> DQ6R/DIFFIO_RX_R10p AW4 --> DQ6R/DIFFIO_RX_R10n AR5 --> DQS7R/DIFFIO_RX_R11p AT5 --> DQS7R/DIFFIO_RX_R11n Any idea?