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Problem when I try to simulate pcie_avmm_dma example design for Cylone 10GX

AKARP2
Beginner
401 Views

When I run tcl scripts they can't find file

pcie_example_design_inst_board_pins_bfm_ip_altera_conduit_bfm_191_nz2pxji.sv.

Please, advice

Thank you

0 Kudos
8 Replies
SengKok_L_Intel
Moderator
204 Views

Hi,

 

Are you run the simulation by using the IP generated example design?

 

Did you go to the "../*_tb/*_tb/sim/mentor/" folder to run the simulation script?

 

What is the simulation tool that you are using (Modelsim Intel FPGA, VCS or..)?

 

Regards -SK

AKARP2
Beginner
204 Views

Hi,

Are you run the simulation by using the IP generated example design?

Yes

Did you go to the "../*_tb/*_tb/sim/mentor/" folder to run the simulation script?

Yes

What is the simulation tool that you are using (Modelsim Intel FPGA, VCS or..)?

ModelSim 10.6d starter

 

Thank you for replay

Regards, Alex

SengKok_L_Intel
Moderator
204 Views

Hi Alex,

 

I’m using the following steps but does not see the error:

 

  1. Generate the PCIe avmm DMA example design from PCIe IP GUI by using Quartus 19.1 pro
  2. Open modelsim 10.6d, and change the directory to “ xxx_example_design/xxx_example_design_tb/ xxx_example_design_tb/sim/mentor”
  3. Source msim_setup.tcl
  4. Type ld_debug in Transcript
  5. Add waveform
  6. Type run -all in transcript

 

Regards -SK 

AKARP2
Beginner
204 Views

Hi,

I'm using the same sequence as you.

I am working with Quartus Prime Pro 19.2, system - Windows 10

In “ xxx_example_design/xxx_example_design_tb/ ip/xxx_example_design_tb/xxx_example_design_tb/

pcie_example_design_inst_board_pins_bfm_ip/sim/common/modelsim_files”

you can find line:

lappend design_files "vlog -sv $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_conduit_bfm_191/sim/pcie_example_design_inst_board_pins_bfm_ip_altera_conduit_bfm_191_nz2pxji.sv"]\" -L altera_common_sv_packages -work altera_conduit_bfm_191"

And this file is absent in this directory.

Can you send it to me?

e-mail alex.karpel@cmt-med.com

Thank you, Alex

 

 

SengKok_L_Intel
Moderator
204 Views

Hi Alex,

 

I'm not seeing the same error as you. But I encountered another problem when I almost finish running the simulation. It is somehow stopped with a Fatal Error. There is no solution at this moment, and this is tentatively targetted to fix in the next software release. There is a plan to release a KDB solution for this case.

 

I apologize for the inconvenience caused.

 

Regards -SK

AKARP2
Beginner
204 Views

Thank you.

I will wait for update.

Regards,

Alex

 

 

SengKok_L_Intel
Moderator
204 Views

Hi Alex,

 

FYI. Arria 10 Gen2 mode is having the same fatal error, however, Arria 10 Gen 3 mode is working fine in the simulation.

 

Regards -SK

 

SengKok_L_Intel
Moderator
204 Views

FYI. I have just tested the Cyclone 10 GX PCIe AVMM DMA simulation in Quartus Prime version 19.4, it works well with ModelSim SE.

 

Regards -SK

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