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Programming fail with this message : Error (209031): Device chain in Chain Description File does not match physical device chain -- expected 1 device(s) but found 2 device(s). Don't know how to fix

MEpis1
Beginner
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​Using  Cyclone 10 FPGA evaluation kit. Using Quartus Prime  Lite 18.1  USB. Board/HW is correctly detected. Program correctly compiled no errors.  Programming operation immediately fails.  Don't know how to fix. Thanks

Mark

 

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ak6dn
Valued Contributor III
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You don't say exactly which kit you are using (is it this: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=253&No=1140 ).

However, it is likely because the Cyclone10 part has an attached EPCQ EEPROM for program storage, and your image has the Altera SFL (Serial Flash Loader) module installed so that it makes the EEPROM device appear as a second JTAG device in the chain.

 

What you need is to build a .cdf (chain descriptor file) that accounts for that device. Something like this is what I have for my CycloneIV/EPCS based board:

 

JedecChain; FileRevision(JESD32A); DefaultMfr(6E);   P ActionCode(Cfg) Device PartName(EP4CE22F17) Path("") File("DE0_PDP8.sof") MfrSpec(OpMask(1) SEC_Device(EPCS64) Child_OpMask(1 3) SFLPath("DE0_PDP8.jic"));   ChainEnd;   AlteraBegin; ChainType(JTAG); AlteraEnd;

 

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MEpis1
Beginner
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Thanks for the answer, I’ll give this a try. And yes, this is the kit I’m using. I’ll look but I don’t think there was anything about this in the kit manual. Mark KU3O
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ak6dn
Valued Contributor III
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Here is the Intel/Altera APP note on using this functionality ...

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an370.pdf

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MEpis1
Beginner
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Thanks. I’ll go thru this. A couple of things: In trying find part and device names I found the BOM does not match the board I have. I have EPCQ 128A instead of the EPCQ64 listed in the BOM. BURRIED in a note in the user manual is a statement “When using SFL core and Intel Quartus Prime Programmer to program/erase the EPCQ64 flash, Virtual JTAG must be bypassed that set SW1.4 to ON. Signal Net VTAP_BYPASSn is logic 0.” Now some of this is gibberish (I’m just starting this stuff) but I tried flipping that DIP switch and it worked ! So I don’t need to include a .cdf (for now). I would not have looked in that section of the doc if not for your help. So THANKS ! Mark KU3O
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