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Altera_Forum
Honored Contributor I
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Programming flash with NIOS II software on CYCLONE III DSP devkit

Hello 

I'm trying to load my design from the flash memory, I've managed to program my hardware to the flash by following the instructions about creating a pof file and using the pfl megafunction. but I don't see how to merge the software into pof file. 

so I tried the flash programmer, however when I use it everything looks OK until the FPGA tries to load, then the "ERROR" led gets lit and nothing else happens. 

could the problem be with the off set addresses I specify? 

 

any ideas? has anyone else had these problems?
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Altera_Forum
Honored Contributor I
47 Views

updates: 

it appears that the flash programmer does work, but that writing to address 0x00 interferes with the hardware download to the FPGA, if I burn sof file to the FPGA it loads the software from the flash. 

 

I tried to write to an offset address (and defined it in the NIOS reset vector) , and although the hardware download worked, the NIOS need the software to be in address 0x00 AND in the offset address. 

 

this is a DSP board, don't they think people would want to have software and hardware in the flash instead of valotile memory? 

 

does anyone has any suggestions on how to keep them both on the flash?
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