Qualtus Prime 16 and DE4 with DDR2

[Altera_Forum]

I use Terasic DE4-230 with Qualtus Prime 16.0 

 My DE4_Install/demonstrations/DE4_230/DE_DDR2_UniPHY/DE4_DDR2 fit failed with   error 169008 : Can't turn on open-drain option for differential I/O pin M1_DDR2_clk[1]  same error with M1_DDR2_clk_n[1], M1_DD2_dqs[1], ... M1_DDR2_dqsn[7]   and error 171000 Can't fit design in device.  same problem with DE4_GOLDEN_TOP.   and DE4 System builder Generate with DDR2 SODIMM_1 or _2 shows Dialog bellow  --------------------------- Information --------------------------- ===== DDR2 System Builder warning ===== Please add the DDR2 Controller IP to your Quartus project, follow by the steps below to prevent any errors from occurring during compilation.  1). Create correct pin assignment for DDR2. 2). Setup correct parameters in DDR2 controller dialog.  3). Execute TCL files, generated by DDR2 IP, under your Quartus project.   --------------------------- OK  ---------------------------  where can I found "correct pin assignment for DDR2" ?

[Altera_Forum]

Thanks for using DE4-230 board, FYI, DE_DDR2_UniPHY example is designed for Quartus II 11.1 SP2 purpose, thus there would be some compatibility issue when comes to Quartus II 16.0, solution A is to run Quartus II 11.1 SP2 instead.  

 In addition, please help refer to DE4 user manual → Table 2–15 DDR2-SO-DIMM-1 Pin Assignments, Schematic Signal Names, and Functions. Or say, to set up new project by using DE4 System Builder? For more details, please find those in DE4 user manual, Chapter 4 DE4 System Builder.  Regards, Nikita from Terasic