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Hi Guys,
I should start with saying that I am a newbie to FPGA design and to Quartus. I recently got Altera Cyclone III Starter Board. I am running Quartus II web edition 8sp1 under windows vista. I also have the HSMC DVI card of Bitec ltd. connected to my Cyclone III board. So my problem is that none of the bundle examples are simulating. More details: my_first_fpga compiled but when i wanted to run the simulation, it says : no simulation input file assignment specified on simulator page of the settings dialog box. Looking for a *.vwf,*.cvwf, etc file which I dont have in that directory. ciii_power_demo compiled but when i clicked on "start simulation" the following error occured Info: Can't find specified vector source file "C:/Altera/Kits/CycloneIII_Starter_Kit-v7.1.0/Examples/CIII_Power_Demo/CIII_Power_Demo_100MHz_25perc.vwf" Error: No valid vector source file specified and default file "C:/Altera/Kits/CycloneIII_Starter_Kit-v7.1.0/Examples/CIII_Power_Demo/CIII_Power_Demo.cvwf" does not exist Error: Quartus II Simulator was unsuccessful. 1 error, 0 warnings Error: Peak virtual memory: 285 megabytes Error: Processing ended: Wed Oct 08 17:11:40 2008 Error: Elapsed time: 00:00:07 Error: Total CPU time (on all processors): 00:00:07 I also tried it with a test program downloaded from Bitec's website. bitec hsmc dvi eval kit 8.0 it doesnt compile. the error msg is as followed : Error: Node instance "my_alt_vip_vfb" instantiates undefined entity "alt_vip_vfb_GNB6BVQENR" Info: Generated suppressed messages file C:/Altera/hsmc_dvi_eval_kit_8.0/hsmc_dvi_eval_kit_8_0.map.smsg Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 276 warnings Error: Peak virtual memory: 243 megabytes Error: Processing ended: Wed Oct 08 17:13:58 2008 Error: Elapsed time: 00:00:37 Error: Total CPU time (on all processors): 00:00:14 Error: Quartus II Full Compilation was unsuccessful. 3 errors, 276 warnings I need urgent help. Thank you guys all in advance.Link Copied
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--- Quote Start --- Hi Guys, I should start with saying that I am a newbie to FPGA design and to Quartus. I recently got Altera Cyclone III Starter Board. I am running Quartus II web edition 8sp1 under windows vista. I also have the HSMC DVI card of Bitec ltd. connected to my Cyclone III board. So my problem is that none of the bundle examples are simulating. More details: my_first_fpga compiled but when i wanted to run the simulation, it says : no simulation input file assignment specified on simulator page of the settings dialog box. Looking for a *.vwf,*.cvwf, etc file which I dont have in that directory. ciii_power_demo compiled but when i clicked on "start simulation" the following error occured Info: Can't find specified vector source file "C:/Altera/Kits/CycloneIII_Starter_Kit-v7.1.0/Examples/CIII_Power_Demo/CIII_Power_Demo_100MHz_25perc.vwf" Error: No valid vector source file specified and default file "C:/Altera/Kits/CycloneIII_Starter_Kit-v7.1.0/Examples/CIII_Power_Demo/CIII_Power_Demo.cvwf" does not exist Error: Quartus II Simulator was unsuccessful. 1 error, 0 warnings Error: Peak virtual memory: 285 megabytes Error: Processing ended: Wed Oct 08 17:11:40 2008 Error: Elapsed time: 00:00:07 Error: Total CPU time (on all processors): 00:00:07 I also tried it with a test program downloaded from Bitec's website. bitec hsmc dvi eval kit 8.0 it doesnt compile. the error msg is as followed : Error: Node instance "my_alt_vip_vfb" instantiates undefined entity "alt_vip_vfb_GNB6BVQENR" Info: Generated suppressed messages file C:/Altera/hsmc_dvi_eval_kit_8.0/hsmc_dvi_eval_kit_8_0.map.smsg Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 276 warnings Error: Peak virtual memory: 243 megabytes Error: Processing ended: Wed Oct 08 17:13:58 2008 Error: Elapsed time: 00:00:37 Error: Total CPU time (on all processors): 00:00:14 Error: Quartus II Full Compilation was unsuccessful. 3 errors, 276 warnings I need urgent help. Thank you guys all in advance. --- Quote End --- Hi Tyler, are you trying to use the QuartusII internal simulator ?
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i fixed it.
thank you co much anyways- Mark as New
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Would you care to share? Your Bitec error is very similar to one I am experiencing. I'm sure it's a Settings configuration somewhere that I don't understand.
William Guynes- Mark as New
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you should erase all the back up files from your system, including .altera .quartus files in your "documents" folder and also "db" files created probably in the same folder with your project.
it should compile if you erase them all. tyler- Mark as New
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Thanks!
My error was a bit different and turned out to be a permissions problem. I was desperate to try anything though. I will remember the things to delete for future reference. William Guynes- Mark as New
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I had the permission problem, too. If you had indicated that, I would tell you what to do to fix it as well :)
Anyways, I am glad it has been solved.
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