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Question about FPGA I/O interfacing on Dev Kits

Honored Contributor II

Hi - I have bought a chinese Altera dev kit: The fpga i/o is interfaced to an lcd panel using 'level shift' interface chip. BUT the levels on both sides of this chip are the same! 

I've noticed this quite often on various fpga schematics - why is this chip needed if the levels are the same? 


Just for info : the bus to the lcd panel is bidirectional on my board - but I can't see why the level-shift buffer is needed at all. 


I've even seen some schematics where the lcd panel is only written to (ie uni-directional), and the levels are identical - why is this chip needed? 

Thanks John B.
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2 Replies
Honored Contributor II

I don't have your board schematics, nor I know what type of interface is used there, so I only can make some guesses. 

There are more reasons for which the designer may want to add a 'level shift' inferface, 

besides actually shifting voltage levels. 

First of all it could serve as a buffer, in order to drive a current higher that that provided 

by fpga I/Os. Or it could be used to somehow protect FPGA ports against damage, in the case the 

LCD comes as a plug-in component, and/or if the same LCD signals are available as general purpose user I/Os  

(it's easier and cheaper to replace a small buffer chip than the FPGA).
Honored Contributor II

Many thanks for your reply - you must be right - it must be for buffering and/or protection reasons. (the LCD is a plug in module). Thanks for the comprehensive response. John B.