We have a VHDL MAC core (supporting RGMII and GMII) and we are trying to port a RGMII design to a Cyclone 10.
We found out ALTDDIO (both IN and OUT) are no more supported adn that we should use an GPIO IP core.
First question, we dont want to use IP cores, we would like to instantiate it, we found a cyclone10gx_ddio_in component in package cyclone10gx_components, but we cant find a way to instantiate it.
Second: we found this one (https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base...) which sounds not promising to me...
Is there any way to use simple double data rate IO in a cyclone 10?
Thanks in advance for any help
Pls see my comment below.
I apologize for the inconvenience and appreciate your understanding at the same time.
I have not hear back from you for close to 1 month.
Hopefully my earlier explanation is clear to you.
For now, I am setting this case to closure.